August 17, 2026 — For years, Google has designed its own Tensor Processing Units (TPUs) in-house, with Broadcom serving as the key partner bringing those designs to silicon. That familiar formula may be changing for the tenth generation .

According to a client report from semiconductor research firm SemiAnalysis, Google is now working with AMD on a version of the 10th-generation TPU . If confirmed, the collaboration would mark AMD's first real entry into the custom AI ASIC market — a significant departure from its traditional role as a supplier of general-purpose GPUs and CPUs .

This is not about replacing Broadcom entirely. Google's 9th-generation TPU, currently in development, is still being built with Broadcom and MediaTek . The AMD collaboration appears targeted specifically at a variant of the TPU v10 series, designed to address a specific and growing challenge in AI infrastructure: the increasing demand for CPU resources alongside AI accelerators .

Why AMD? The CPU Integration Hypothesis

The core of the collaboration, according to SemiAnalysis, revolves around one specific capability: AMD's CPU IP and advanced packaging expertise .

Google and its customers are pushing to integrate CPU cores directly into the TPU package to handle reinforcement learning workloads for agentic and inference-focused AI models . While traditional large language model training remains heavily reliant on AI accelerators, inference and agentic models require more general-purpose computing resources .

This trend is already visible in Google's current infrastructure. The TPU 8i system, designed for inference and reinforcement learning workloads, pairs two TPUs with one Google Axion CPU . By contrast, the 7th-generation TPU servers used four TPUs per Intel Xeon processor . Some workloads may eventually require a near 1:1 ratio of accelerators to CPUs .

AMD's potential value proposition is clear: the company has already built a similar product. The Instinct MI300A combines x86 CPU and accelerator chiplets in a single, tightly integrated package . AMD also brings strong IP in advanced packaging and SoIC (System-on-Integrated-Chips) technology, which could be essential for shrinking the distance between CPU and tensor operations to reduce latency and power consumption .

Importantly, the collaboration does not necessarily mean AMD is replacing Broadcom entirely. The 9th-generation TPU remains a Broadcom-led project . The AMD collaboration is likely focused on a specific variant of the TPU v10 series, built around a CPU-centric design optimized for reinforcement learning rather than the massive tensor operations that characterize large language model training .

Industry Context: AMD's Broader AI Momentum

The reported Google collaboration arrives as AMD is riding a wave of AI momentum. In July 2026, at the Advancing AI conference, CEO Lisa Su projected a $2 trillion total computing market by 2030, with AI accelerators accounting for $1.4 trillion of that figure .

AMD's product roadmap is accelerating:

• Instinct MI400 series: The Helios platform integrates up to 72 MI455X accelerators and is already in production
• EPYC Venice: A 256-core Zen 6 server CPU that AMD claims outperforms Intel's Xeon by up to 3.4x and Nvidia's Vera CPU by approximately 20%
• Customer commitments: Meta, OpenAI, and Anthropic have all placed gigawatt-scale orders, with Meta and OpenAI receiving warrants equivalent to approximately 10% of AMD shares each

Financially, AMD has been aggressive in funding this expansion. On August 13, the company issued a record $4.75 billion bond offering, its largest debt raise ever, with proceeds intended for general corporate purposes including potential debt repayment . The offering was oversubscribed, with the 10-year bonds pricing just 90 basis points above U.S. Treasuries . Analysts expect AMD's 2026 revenue to grow 47% year-over-year to over $51 billion .

The Google collaboration, if confirmed, would add a new dimension to AMD's AI story. Rather than competing directly with Nvidia in every segment, AMD would be providing the underlying CPU and packaging technology for one of the world's largest cloud operators' custom silicon . For Google, it would diversify its supplier base for the growing CPU-accelerator integration needs of its AI infrastructure.

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